A matrix-type liquid crystal display panel conventionally has a structure shown in FIG. 13. To be more specific, this liquid crystal display panel includes a group 101 of scanning line electrodes, a group 102 of data line electrodes, and a liquid crystal (not illustrated) sandwiched between the groups 101 and 102. The group 101 of scanning line electrodes is made up of scanning line electrodes X1 to Xm provided sidewards and being in parallel with each other. Meanwhile, the group 102 of data line electrodes is made up of data line electrodes Y1 to Yn provided longitudinally and being in parallel with each other, and also crossing the scanning line electrodes X1 to Xm at right angles. Moreover, a pixel P is formed at the intersection of a scanning electrode Xi (m=i) and a data line electrode Yj (n=j).
For instance, typical driving method of this kind of liquid crystal display panel is explained in publications including Japanese Laid-Open Patent Application No. 60-222835/1985 (Tokukaisho 60-222835; published on Nov. 7, 1985) titled “Driving Method of Liquid Crystal Matrix Display Panel” and Japanese Laid-Open Patent Application No. 62-3229/1987 (Tokukaisho 62-3229; published on Jan. 9, 1987) titled “Liquid Crystal Driving Method”. These driving methods apply a voltage sufficient to alter an optical characteristic (transparency) of liquid crystal of the pixel by transmitting a signal to the pixel via the scanning line electrode and data line electrode, when the liquid crystal of the pixel is addressed. Matrix-type liquid crystal displays applying a voltage to a pixel have this kind of addressing method in common, regardless of the types of the panels such as TFT (Thin Film Transistor) and STN (Super Twisted Nematic).
As the driving methods above show, transmitting the scanning signal and the data signal to the pixel is necessary for driving the matrix-type liquid crystal display panel. Thus as FIGS. 14 and 15 show, the liquid crystal display panel 111 is conventionally arranged so that an LSI chip 112 for driving data lines (hereinafter, will be simply referred to as data LSI chip) is provided on a side of a display area 111b formed on a glass substrate 111a of a liquid crystal panel 111, whereas an LSI chip 113 for driving scanning lines (hereinafter, will be simply referred to as scanning LSI chip) is provided on another side of the liquid crystal panel 111.
In the arrangement shown in FIG. 14, a TCP (Tape Career Package) 114 on which the data LSI chip 112 (“LSI Chip” in the figure) is mounted and a TCP 115 on which the scanning LSI chip 113 (“LSI Chip” in the figure) is mounted are connected to the glass substrate 111a on which electrodes are provided.
In the arrangement shown in FIG. 15, the LSI chips 112 and 113 are directly mounted on the glass substrate 111a by a method termed COG (Chip On Glass). Moreover, a flexible printed board 116, for transmitting a control signal and applying a supply voltage to the LSI chips 112 and 113, is connected to the glass substrate 111a. 
There is another arrangement such that, as shown in FIG. 16, a TCP 118 on which a single LSI chip 117 (“LSI Chip” in the figure) is mounted is connected to a side of the glass substrate 111a (see Japanese Laid-Open Patent Application No. 6-34987/1994 (Tokukaihei 6-34987; published on Feb. 10, 1994)). In the LSI chip 117, driving circuits generating the data signal and the scanning signal are integrated altogether.
There is a further arrangement such that, as FIG. 17 shows, two scanning LSI chips 113 are provided on opposing sides of the data LSI chip 112 and on the TCP 119, and the TCP 119 is connected to a side of the glass substrate 111a (see Japanese Laid-Open Patent Application No. 6-34987/1994 (Tokukaihei 6-34987; published on Feb. 10, 1994) and Japanese Laid-Open Patent Application No. 6-11721/1994 (Tokukaihei 6-11721; published on Jan. 21, 1994)). In this arrangement the display area 111b is provided on the center of the glass substrate 111a so that sets of wires for the scanning electrodes, which extend from the TCP 119 to the display area 111b, are separately provided on both sides of the display area 111b. On this account, two scanning LSI chips 113 are provided.
However, the conventional arrangements shown in FIGS. 14 and 15 require to provide two LSI chips 112 and 113 for generating a driving signal on at least two sides of the liquid crystal panel 111. Thus as FIG. 14 shows, at least TCPs 114 and 115 on which the chips above are mounted are required so that the arrangements should be complicated and demand greater numbers of the parts accordingly. Therefore this type of arrangement costs a lot.
When the COG technique shown in FIG. 15 is employed, it is required that the data LSI chip 112 and the scanning LSI chip 113 are mounted on at least two sides of the glass substrate 111a. In this arrangement the center of the glass substrate 111a and that of the display area 111b are not matched when actually mounted so that a non-display area (frame) surrounding the display area 111b has to be broad, to match the center of a device, on which the liquid crystal panel 111 is mounted, with the center of the display area 111b. 
For instance, as FIG. 18 shows, a non-mounting part of the non-display area of the glass substrate 111a, on which the LSI chips 112 and 113 are not mounted, is not necessarily broad, whereas a mounting part of the non-display area, on which the LSI chips 112 and 113 are mounted, has to be broad. More specifically, when the width of the mounting part is 5 mm while that of the non-mounting part is 1 mm and the distance between the edge of the glass substrate 111a and a housing 121 storing the liquid crystal panel 111 is 1 mm, the distance between the edge of the display area 111b and an interior wall of the housing 121 is 6 mm on the mounting part side, whereas the distance above is 2 mm on the non-mounting part side.
When the arrangement shown in FIG. 15 is manufactured in accordance with the dimensions given above, a device on which the liquid crystal panel 111 is mounted includes, as FIG. 18 shows, the display area 111b provided on the right-hand side of the housing 121. Although it depends on the shape of a device, generally the device looks good when the center of the display area 111a is at an equal distance from both right and left edges of the housing 121. (Directions such as above, below, right, and left mentioned in this description are defined as those for a viewer of the display.) On this account, to form the housing 121 symmetrically, it is required to set both of distances between the right edge of the display area 111b and the interior wall of the housing 121 and between the left edge thereof and the interior wall thereof to 6 mm. However, the sideward length of this housing 121 is unnecessarily long.
The problem of the aforementioned COG arrangement does not much matter for a conventional device using the TCP, since the film can be bent by providing a slit thereon. However, even in the arrangement shown in FIG. 14, an area having around 2 mm width is required to connect the TCPs 114 and 115 to the glass substrate 111a so that a similar inconvenience occurs when forming the housing 121, even though the inconvenience is less prominent than the case of the COG.
The arrangement shown in FIG. 16 requires to include all circuits for driving the liquid crystal panel 111 in the LSI chip 117. For instance, when a color liquid crystal panel including 128×164 pixels is driven, 128×3 (R, G, B) data line electrodes and 164 scanning line electrodes are required so that the LSI chip 117 has to have 548 driving terminals in total.
There can be another arrangement so that the data line electrodes are separately provided above and below the display area 111b and hence the liquid crystal panel 111 is driven by two LSI chips respectively provided on the upper and lower sides of the glass substrate 111a. In this arrangement, each of the upper and lower LSI chips has 128×3 data line electrodes and 82 scanning line electrodes and hence each of the two LSI chips has to have 466 driving terminals in total.
However, cost of an LSI chip including a lot of driving circuits and corresponding terminals is expensive, since the chip is large in size so that only a small number of the chips can be manufactured from one wafer.
Moreover, generally a voltage sufficient to alter an optical characteristic (transparency) of a liquid crystal material is around 10V as an effective voltage. However, a voltage applied to a liquid crystal is normally converted to alternate current to keep reliability of the liquid crystal material. On this account, around a ±10V (or 20V in amplitude) driving voltage may be required in reality, depending on a driving method.
Compared with a conventional LSI manufacturing process for manufacturing a low-voltage-driven circuit (around 5V) such as a logic circuit, a manufacturing process to manufacture a high-voltage-driven circuit (such as 20V) requires high cost and also the LSI chip thereof has to be large in area to endure a high voltage.
Some driving methods etc. allow to set a voltage applied to a chip for numerous data line electrodes low. In this case the LSI chip for the data line electrodes can be manufactured in a conventional process for manufacturing a logic circuit etc. When this kind of LSI chip is employed for the data line electrodes, a voltage driving liquid crystal is insufficient since a driving voltage of a circuit manufactured in the conventional LSI manufacturing process is roughly between 0V and 5V. Thus the liquid crystal driving voltage has to be supplemented by increasing a driving voltage applied to scanning electrodes. On this account, only the LSI chip for the scanning electrodes is manufactured in the process to manufacture the expensive LSI capable of enduring a high voltage, so that it is possible to reduce a total cost for the driving device.
However, as FIG. 16 shows, the arrangement employing a single LSI chip 117 cannot divide the LSI chip into the chip for the data line electrodes and that for the scanning line electrodes. On this account, the LSI chip 117 has to be manufactured in the process to manufacture the expensive LSI capable of enduring a high voltage, so that it is not possible to reduce the cost of the LSI chip 117.
In the meantime, in the arrangement shown in FIG. 17 two scanning LSI chips 113 are provided on the TCP 119 and hence the data LSI chip 112 and two scanning LSI chips 113 can be manufactured in each different LSI manufacturing process. Thus costs for the LSI chip can be reduced in this arrangement, compared to the arrangement shown in FIG. 16. However, including two scanning LSI chips 113 makes it necessary to transmit the control signal for driving scanning lines, which is input from the outside, from both groups of terminals respectively provided on both sides of the connecting terminals 119a of the TCP 119. Thus an arrangement of a surrounding part of the TCP 119 has to be complex and the number of required parts as a driving device is increased, so that the cost is expensive.
As FIG. 20 shows, an arrangement below is employed when a drive LSI chip 132 for driving is mounted on a TCP 131. This TCP 131 includes leads 133 for transmitting signals fixed on an insulating film base 134 via an adhesive layer 135. The LSI chip 132 is attached to the leads 133 by fixing bumps 136, provided on a mounting surface of the LSI chip 132, to the leads 133. The leads 133 forming a wiring layer is protected with a protector 136 made up of a solder resist etc. Also the LSI chip 132 and the leads 133 are protected with a resin layer 137.
The TCP 131 arranged as above includes the film base 134 to which an adhesive for forming the adhesive layer 135 is applied in advance, and through which a device hole 131a as a space for mounting the LSI chip 132 is formed. Then a conductive material such as a copper film is pasted on the film base 134, and wires including the leads 133 is formed by etching the conductive material. The TCP 131 arranged as above has an advantage so that the leads 133 can be easily aligned with the bumps 136, since the leads 133 are provided as jutting into the device hole 131a. 
However, the above-arranged TCP 131 has a disadvantage so that it is impossible to provide any wires except the ones connected to the LSI chip 132 in the area where the LSI chip 132 is provided, due to the existence of the device hole 131a. A material used for the leads 133 (wire) is a conductive material such as a copper film sized around 20 μm thick and 40 μm wide, so as to be disconnected easily. Therefore even if one tries to mount the LSI chip 132 in the device hole 131a in which no film base is provided by leaving only the wires, the wires are easily disconnected by stress generated in the process of mounting the LSI chip 132.
Moreover, stress is generated due to an injection of a resin material into the device hole 131a when the resin layer 137 is formed. So the wires not fixed on the film base 134 are pushed away owing to the stress so as to be short-circuited with other wires or the bumps 136 formed on the LSI chip 132. Incidentally, the thickness of the film base 134 is around 75 μm.